The present invention relates to CMOS delay circuits suitable for use in on-chip clocks or oscillators and timing delay circuits, and more particularly, to a low voltage low power compact CMOS delay circuit for use in low voltage low power devices.
Delay circuits are commonly utilized in on-chip clocks or oscillators as well as timing delay circuits. Conventional CMOS delay circuits use ramps, comparators, and voltage references to ensure that the delay will not vary with supply voltage and operating temperature. However, these circuits are complex and require a significant amount of chip area, and are difficult to design for low supply voltages.
There are numerous examples of devices which can benefit from circuits incorporating low voltage low power delay circuits. One example of such a device is a displacement measuring instrument, such as a hand-held electronic caliper that can be used for making precise geometric measurements, such as that shown in U.S. Pat. No. 5,901,458, which is commonly assigned and hereby incorporated by reference in its entirety. Another example of such a device is shown in U.S. Pat. No. 5,886,519, which is commonly assigned, and incorporated herein by reference in its entirety. The ""519 patent discloses an inductive absolute position transducer for high accuracy applications, such as linear or rotary encoders, electronic calipers and the like. It is obvious that the less power such instruments use, the fewer batteries (or other power sources) they will require and the longer they will operate before the batteries (or other power sources) need to be replaced or replenished. However, reducing the power requirements of such devices is a complex task. Such devices are required to make highly accurate measurements, and the signal processing techniques that have been developed for such are required to both accomplish the desired accuracy and operate at low voltage and power levels, and be relatively insensitive to reasonable variations in supply voltage and operating temperature.
The present invention is directed to a versatile and compact delay circuit that is relatively insensitive to reasonable variations in supply voltage and operating temperature, for inclusion in CMOS integrated circuits that are used in low voltage low power devices.
The present invention provides a low voltage low power versatile, compact and stable delay circuit for CMOS integrated circuits. In accordance with one aspect of the invention, a common signal is used to control both a trip-point voltage of a comparator and a voltage change rate of a clock ramp signal input to the comparator, such that variations in a voltage supplied to the delay circuit during normal operation will not substantially affect the clock period of the delay circuit.
In accordance with another aspect of the invention, the biasing circuit and a biased transistor comparator of the delay circuit are implemented with a relatively few simple transistor stages. This approach makes the circuit compact and allows for operation at very low supply voltages.
In accordance with another aspect of the invention, the delay circuit may be used in a device that is operable from a power supply providing a voltage less than 1.75 volts (e.g., a single 1.5 volt watch battery or solar cell providing a voltage as low as 1.5 volts nominal, 1.35 volts minimum), and has a current drain compatible with devices which require an overall current drain of a few microamps or less.
In accordance with another aspect of the invention, the delay circuit may be used in systems with voltages higher than 1.5 volts, such as one that is operable from a power supply providing a voltage less than 3.5 volts (e.g., two 1.5 volt watch batteries or solar cells in series). The invention is also advantageous in some applications operating with voltages higher than 3.5 volts.
In accordance with another aspect of the invention, certain components are selected to reduce the sensitivity of the overall system to process parameters. More specifically, by using resistors and capacitors of the same type in circuitry such as a clock/oscillator generator, and by charging the capacitors with scaled bias currents, certain factors (e.g., scale factors) of the system are made to be independent of process parameters, as well as later environmental effects due to operating temperature, circuit aging, and the like.
In accordance with another aspect of the invention, the time delay of the delay circuit is made to depend only on certain passive components, such as resistors and capacitors. The time delay is thus made to be insensitive to variations in supply voltage and reference voltage levels. This enables the circuit to be implemented with simple transistor stages without introducing excessive variations in the time delay that could otherwise be caused by changes in operating temperature or changes in voltage levels. This is particularly advantageous in circuits where several timing elements need to track with one another, since these different timing elements can be constructed with similar resistors and capacitors.
In accordance with another aspect of the invention, the ramp generator of the present invention can be implemented with relatively simple circuitry, and consequently be of a small size and operable from low voltage. An operating speed limitation of the system is due to the nature of the ramp itself, since a ramp inherently takes time to transition. However, since high-speed operation is not a critical factor in the signal processing of a variety of devices (e.g., certain portable or handheld measuring instruments), this implementation provides an effective tradeoff of a slower system for one that uses less power, is of a smaller size and is operable from low voltage.